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Message-ID: <1553863315-6652-2-git-send-email-yannick.fertre@st.com>
Date:   Fri, 29 Mar 2019 13:41:54 +0100
From:   Yannick Fertré <yannick.fertre@...com>
To:     Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Benjamin Gaignard <benjamin.gaignard@...com>,
        Yannick Fertre <yannick.fertre@...com>,
        Philippe Cornu <philippe.cornu@...com>
Subject: [PATCH v1 1/2] ARM: dts: stm32: add cec pins muxing on stm32mp157

Add a new pin muxing for cec.

Signed-off-by: Yannick Fertré <yannick.fertre@...com>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 9104896..54fe2ad 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -157,6 +157,15 @@
 				};
 			};
 
+			cec_pins_b: cec-1 {
+				pins {
+					pinmux = <STM32_PINMUX('B', 6, AF5)>;
+					bias-disable;
+					drive-open-drain;
+					slew-rate = <0>;
+				};
+			};
+
 			ethernet0_rgmii_pins_a: rgmii-0 {
 				pins1 {
 					pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
-- 
2.7.4

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