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Message-ID: <6ec3dc39-ea9b-db3b-25d1-822601d06391@free.fr>
Date:   Fri, 29 Mar 2019 15:00:00 +0100
From:   Marc Gonzalez <marc.w.gonzalez@...e.fr>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Kishon Vijay Abraham I <kishon@...com>,
        MSM <linux-arm-msm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Can Guo <cang@...eaurora.org>,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        Evan Green <evgreen@...omium.org>,
        Jeffrey Hugo <jhugo@...eaurora.org>
Subject: Re: [PATCH] phy: qcom: qmp: Add SDM845 PCIe QMP PHY support

On 22/03/2019 14:42, Marc Gonzalez wrote:

> On 26/02/2019 07:59, Bjorn Andersson wrote:
> 
>> @@ -1384,6 +1536,11 @@ static int qcom_qmp_phy_init(struct phy *phy)
>>  
>>  	qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
>>  
>> +	if (cfg->pcs_misc_tbl) {
>> +		qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl,
>> +				       cfg->pcs_misc_tbl_num);
>> +	}
>> +
>>  	/*
>>  	 * UFS PHY requires the deassert of software reset before serdes start.
>>  	 * For UFS PHYs that do not have software reset control bits, defer
> 
> I think it would be better to configure pcs_misc *before* pcs.
> That would be closer to what downstream does (for 835 and 845 at least).
> 
> Also you don't need to test for NULL as that is already done in
> qcom_qmp_phy_configure() -- and in fact even that test is redundant,
> since the array is not dereferenced when count is 0.
> 
> When are you planning on sending a v2 of your PCIe series?

I split my comments across 3 messages. Have you seen them all?
(And taken them into account?)

Note: I folded the drivers/phy/qualcomm/phy-qcom-qmp.h definitions within
[PATCH v3 1/2] phy: qcom-qmp: Add msm8998 PCIe QMP PHY support

Regards.

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