linux-kernel - [PATCH 1/2] firmware: Intel: Add Stratix10 ECC DBE SMC call

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <1553870639-23895-1-git-send-email-thor.thayer@linux.intel.com>
Date:   Fri, 29 Mar 2019 09:43:58 -0500
From:   thor.thayer@...ux.intel.com
To:     bp@...en8.de, mchehab@...nel.org, james.morse@....com,
        atull@...nel.org, richard.gong@...el.com,
        gregkh@...uxfoundation.org
Cc:     linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thor Thayer <thor.thayer@...ux.intel.com>
Subject: [PATCH 1/2] firmware: Intel: Add Stratix10 ECC DBE SMC call

From: Thor Thayer <thor.thayer@...ux.intel.com>

Reserve ECC Double Bit Error SMC call to alert U-Boot that
a DBE has occurred. Moving the call from local EDAC header
file to this common file.

Reviewed-by: Richard Gong <richard.gong@...el.com>
Reviewed-by: Alan Tull <atull@...nel.org>
Signed-off-by: Thor Thayer <thor.thayer@...ux.intel.com>
---
 include/linux/firmware/intel/stratix10-smc.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/linux/firmware/intel/stratix10-smc.h b/include/linux/firmware/intel/stratix10-smc.h
index 5be5dab50b13..01684d935580 100644
--- a/include/linux/firmware/intel/stratix10-smc.h
+++ b/include/linux/firmware/intel/stratix10-smc.h
@@ -309,4 +309,23 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
 #define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
 #define INTEL_SIP_SMC_RSU_UPDATE \
 	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
+
+/*
+ * Request INTEL_SIP_SMC_ECC_DBE
+ *
+ * Sync call used by service driver at EL1 to alert EL3 that a Double
+ * Bit ECC error has occurred.
+ *
+ * Call register usage:
+ * a0 INTEL_SIP_SMC_ECC_DBE
+ * a1 SysManager Double Bit Error value
+ * a2-7 not used
+ *
+ * Return status
+ * a0 INTEL_SIP_SMC_STATUS_OK
+ */
+#define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
+#define INTEL_SIP_SMC_ECC_DBE \
+	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
+
 #endif
-- 
2.7.4