linux-kernel - Re: [PATCH 1/2] edac: sifive: Add DT documentation for SiFive L2 cache Controller

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Message-ID: <20190329202416.GI21152@zn.tnic>
Date:   Fri, 29 Mar 2019 21:24:16 +0100
From:   Borislav Petkov <bp@...en8.de>
To:     Rob Herring <robh@...nel.org>
Cc:     James Morse <james.morse@....com>,
        Yash Shah <yash.shah@...ive.com>,
        linux-riscv@...ts.infradead.org, linux-edac@...r.kernel.org,
        Palmer Dabbelt <palmer@...ive.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Mark Rutland <mark.rutland@....com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] edac: sifive: Add DT documentation for SiFive L2
 cache Controller

On Fri, Mar 29, 2019 at 02:41:05PM -0500, Rob Herring wrote:
> DT dictates aligning with what the h/w looks like which has little to
> do with OS driver design.

Ok, then, where does this goal for doing a driver or compilation unit
per IP block come from?

Because everytime an ARM EDAC driver pops up, we are having the same
discussion.

> I never said you should change EDAC and I outlined how things should
> be handled if it is one driver.

Ok, we will add that to the EDAC driver design document we're currently
working on.

> DT and OS subsystems are independent things. I can't tell you how to
> design the subsystem and you can't dictate DT design (based on EDAC
> design).

I don't think I've ever intentionally or unintentionally dictated DT
design - all I've opposed to is having multiple EDAC drivers on ARM.

-- 
Regards/Gruss,
    Boris.

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