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Date: Mon, 1 Apr 2019 11:35:34 +0800 From: Zhiyong Tao <zhiyong.tao@...iatek.com> To: <robh+dt@...nel.org>, <linus.walleij@...aro.org>, <mark.rutland@....com>, <matthias.bgg@...il.com>, <sean.wang@...nel.org> CC: <srv_heupstream@...iatek.com>, <zhiyong.tao@...iatek.com>, <hui.liu@...iatek.com>, <eddie.huang@...iatek.com>, <chuanjia.liu@...iatek.com>, <biao.huang@...iatek.com>, <hongzhou.yang@...iatek.com>, <erin.lo@...iatek.com>, <sean.wang@...iatek.com>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>, <linux-gpio@...r.kernel.org> Subject: [PATCH v4 3/4] arm64: dts: mt8183: add pinctrl device node The commit adds pinctrl device node for mt8183 Signed-off-by: Zhiyong Tao <zhiyong.tao@...iatek.com> Signed-off-by: Erin Lo <erin.lo@...iatek.com> --- This patch is based on patch "https://patchwork.kernel.org/patch/10814239/". --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 75c4881bbe5e..cf92504e2a9b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -9,7 +9,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/mt8183-power.h> - +#include "mt8183-pinfunc.h" / { compatible = "mediatek,mt8183"; interrupt-parent = <&sysirq>; @@ -197,6 +197,30 @@ #clock-cells = <1>; }; + pio: pinctrl@...05000 { + compatible = "mediatek,mt8183-pinctrl"; + reg = <0 0x10005000 0 0x1000>, + <0 0x11f20000 0 0x1000>, + <0 0x11e80000 0 0x1000>, + <0 0x11e70000 0 0x1000>, + <0 0x11e90000 0 0x1000>, + <0 0x11d30000 0 0x1000>, + <0 0x11d20000 0 0x1000>, + <0 0x11c50000 0 0x1000>, + <0 0x11f30000 0 0x1000>, + <0 0x1000b000 0 0x1000>; + reg-names = "iocfg0", "iocfg1", "iocfg2", + "iocfg3", "iocfg4", "iocfg5", + "iocfg6", "iocfg7", "iocfg8", + "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 192>; + interrupt-controller; + interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + }; + scpsys: syscon@...06000 { compatible = "mediatek,mt8183-scpsys", "syscon"; #power-domain-cells = <1>; -- 2.12.5
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