linux-kernel - Re: [PATCH net-next 17/17] dt-bindings: net: dsa: Add documentation for NXP SJA1105 driver

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Message-ID: <20190402213845.GI22349@lunn.ch>
Date:   Tue, 2 Apr 2019 23:38:45 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     f.fainelli@...il.com, vivien.didelot@...il.com,
        davem@...emloft.net, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, linus.walleij@...aro.org,
        georg.waibel@...sor-technik.de
Subject: Re: [PATCH net-next 17/17] dt-bindings: net: dsa: Add documentation
 for NXP SJA1105 driver

> +Optional properties:
> +
> +- sja1105,mac-mode, sja1105,phy-mode: Boolean properties that can be assigned
> +  under each port node that is MII or RMII (has no effect for RGMII).  By
> +  default (unless otherwise specified) a port is configured as MAC if it is
> +  driving a PHY (phy-handle is present) or as PHY if it is PHY-less (fixed-link
> +  specified, presumably because it is connected to a MAC).  These properties
> +  are required in the case where SJA1105 ports are at both ends of an MII/RMII
> +  PHY-less setup. One end would need to have sja1105,mac-mode, while the other
> +  sja1105,phy-mode.

Hi Vladimir

phy-mode has a well known meaning, indicating mii, gmii, sqmii, rmii,
rxaud, etc.

The meaning here is quite different. To maybe avoid confusion, could
we flip the name around?

sja1105,mode-mac and sja1105,mode-phy?

> +			port@4 {
> +				/* Internal port connected to eth2 */
> +				ethernet = <&enet2>;
> +				phy-mode = "rgmii";
> +				reg = <4>;
> +				/* Implicit "sja1105,phy-mode;" */
> +				fixed-link {
> +					speed = <1000>;
> +					full-duplex;
> +				};
> +			};
> +		};
> +	};
> +};

> +&enet2 {
> +	phy-connection-type = "rgmii";

You don't see this used much, phy-mode is preferred. Do you have a
reason for this?

Also, you have the MAC using RGMII and the port using RGMII. Neither
is inserting delays. That implies the delays are added by the track
layout of the PCB. It would be good to add a comment about
this. Anybody copying this using a design without the delays via PCB
are probably going to get it wrong to start with and not realise they
need to change one end to RGMII-ID.

Thanks
     Andrew