[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <05164ef1-418f-1c66-21f8-2c8ef3242218@linux.ibm.com>
Date: Fri, 5 Apr 2019 12:18:54 +0200
From: Thomas-Mich Richter <tmricht@...ux.ibm.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Kees Cook <keescook@...omium.org>, acme@...hat.com,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Heiko Carstens <heiko.carstens@...ibm.com>,
Hendrik Brueckner <brueckner@...ux.ibm.com>,
Martin Schwidefsky <schwidefsky@...ibm.com>
Subject: Re: WARN_ON_ONCE() hit at kernel/events/core.c:330
On 4/4/19 3:03 PM, Peter Zijlstra wrote:
> On Thu, Apr 04, 2019 at 01:09:09PM +0200, Peter Zijlstra wrote:
>
>> That is not entirely the scenario I talked about, but *groan*.
>>
>> So what I meant was:
>>
>> CPU-0 CPU-n
>>
>> __schedule()
>> local_irq_disable()
>>
>> ...
>> deactivate_task(prev);
>>
>> try_to_wake_up(@p)
>> ...
>> smp_cond_load_acquire(&p->on_cpu, !VAL);
>>
>> <PMI>
>> ..
>> perf_event_disable_inatomic()
>> event->pending_disable = 1;
>> irq_work_queue() /* self-IPI */
>> </PMI>
>>
>> context_switch()
>> prepare_task_switch()
>> perf_event_task_sched_out()
>> // the above chain that clears pending_disable
>>
>> finish_task_switch()
>> finish_task()
>> smp_store_release(prev->on_cpu, 0);
>> /* finally.... */
>> // take woken
>> // context_switch to @p
>> finish_lock_switch()
>> raw_spin_unlock_irq()
>> /* w00t, IRQs enabled, self-IPI time */
>> <self-IPI>
>> perf_pending_event()
>> // event->pending_disable == 0
>> </self-IPI>
>>
>>
>> What you're suggesting, is that the time between:
>>
>> smp_store_release(prev->on_cpu, 0);
>>
>> and
>>
>> <self-IPI>
>>
>> on CPU-0 is sufficient for CPU-n to context switch to the task, enable
>> the event there, trigger a PMI that calls perf_event_disable_inatomic()
>> _again_ (this would mean irq_work_queue() failing, which we don't check)
>> (and schedule out again, although that's not required).
>>
>> This being virt that might actually be possible if (v)CPU-0 takes a nap
>> I suppose.
>>
>> Let me think about this a little more...
>
> Does the below cure things? It's not exactly pretty, but it could just
> do the trick.
>
Thanks a lot for the patch, I have built a new kernel and let it run over the week end.
s390 does not have a PMI, all interrupts (including the measurement interrupts from
the PMU) are normal, maskable interrupts.
--
Thomas Richter, Dept 3252, IBM s390 Linux Development, Boeblingen, Germany
--
Vorsitzender des Aufsichtsrats: Matthias Hartmann
Geschäftsführung: Dirk Wittkopp
Sitz der Gesellschaft: Böblingen / Registergericht: Amtsgericht Stuttgart, HRB 243294
Powered by blists - more mailing lists