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Message-ID: <CAOMZO5Cfx8-aQ8kauEBtBMzQLCfJZWN6cRjaCgsbo51gtFeuLg@mail.gmail.com>
Date:   Fri, 5 Apr 2019 11:14:42 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        "A.s. Dong" <aisheng.dong@....com>,
        Richard Zhu <hongxing.zhu@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        NXP Linux Team <linux-imx@....com>,
        Fabio Estevam <fabio.estevam@....com>,
        Leonard Crestez <leonard.crestez@....com>,
        Chris Healy <cphealy@...il.com>,
        Lucas Stach <l.stach@...gutronix.de>
Subject: Re: [PATCH v4 3/5] arm64: dts: imx8mq: Combine PCIE power domains

On Sun, Mar 31, 2019 at 11:25 PM Andrey Smirnov
<andrew.smirnov@...il.com> wrote:
>
> According to NXP's FAE feedback and a comment in ATF firmware, PCIE1
> and PCIE2 power domains can't really be used independently. Due to
> shared reset line both power domains have to be turned on at the same
> time. Account for that quirk by combining PCIE power domains into a
> single 'pgc_pcie' power domain.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
> Reviewed-by: Lucas Stach <l.stach@...gutronix.de>

Reviewed-by: Fabio Estevam <festevam@...il.com>

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