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Message-ID: <alpine.DEB.2.21.1904060000260.1802@nanos.tec.linutronix.de>
Date: Sat, 6 Apr 2019 00:00:40 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Josh Poimboeuf <jpoimboe@...hat.com>
cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
Andy Lutomirski <luto@...nel.org>,
Sean Christopherson <sean.j.christopherson@...el.com>
Subject: Re: [patch V2 17/29] x86/exceptions: Disconnect IST index and stack
order
On Fri, 5 Apr 2019, Josh Poimboeuf wrote:
> On Fri, Apr 05, 2019 at 05:07:15PM +0200, Thomas Gleixner wrote:
> > +/*
> > + * The exception stack ordering in [cea_]exception_stacks
> > + */
> > +enum exception_stack_ordering {
> > + ISTACK_DF,
> > + ISTACK_NMI,
> > + ISTACK_DB,
> > + ISTACK_MCE,
> > + N_EXCEPTION_STACKS
> > +};
>
> While clever, it reads as "interrupt stack" to me. ESTACK or IST_STACK
> would be infinitely better.
Fair enough.
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