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Date:   Sun, 7 Apr 2019 23:13:47 +0000
From:   "Ghannam, Yazen" <>
To:     "" <>
CC:     "Ghannam, Yazen" <>,
        "" <>,
        "" <>,
        "" <>,
        "" <>
Subject: [PATCH 0/5] Handle MCA banks in a per_cpu way

From: Yazen Ghannam <>

The focus of this patchset is define and use the MCA bank structures
and bank count per logical CPU.

With the exception of patch 4, this set applies to systems in production

Patch 1:
Moves the declaration of struct mce_banks[] to the only file it's used.

Patch 2:
Splits struct mce_bank into a structure for fields common to MCA banks
on all CPUs and another structure that can be used per_cpu.

Patch 3:
Brings full circle the saga of the threshold block addresses on SMCA
systems. After taking a step back and reviewing the AMD documentation, I
think that this implimentation is the simplest and more robust way to
follow the spec.

Patch 4:
Saves and uses the MCA bank count as a per_cpu variable. This is to
support systems that have MCA bank counts that are different between
logical CPUs.

Patch 5:
Makes sure that sysfs reports the MCA_CTL value as set in hardware. This
is not something related to making things per_cpu but rather just
something I noticed while working on the other patches.


Yazen Ghannam (5):
  x86/MCE: Make struct mce_banks[] static
  x86/MCE: Handle MCA controls in a per_cpu way
  x86/MCE/AMD: Don't cache block addresses on SMCA systems
  x86/MCE: Make number of MCA banks per_cpu
  x86/MCE: Save MCA control bits that get set in hardware

 arch/x86/kernel/cpu/mce/amd.c      |  87 +++++++++---------
 arch/x86/kernel/cpu/mce/core.c     | 138 +++++++++++++++++++----------
 arch/x86/kernel/cpu/mce/inject.c   |   7 +-
 arch/x86/kernel/cpu/mce/internal.h |  12 +--
 4 files changed, 137 insertions(+), 107 deletions(-)


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