linux-kernel - Re: [PATCH V5 00/12] perf: Add Icelake support (kernel only, except Topdown)

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Message-ID: <02e4ddaf-b5a0-a2cb-b829-5720f0bb10d4@linux.intel.com>
Date:   Mon, 8 Apr 2019 18:49:35 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     acme@...nel.org, mingo@...hat.com, linux-kernel@...r.kernel.org,
        tglx@...utronix.de, jolsa@...nel.org, eranian@...gle.com,
        alexander.shishkin@...ux.intel.com, ak@...ux.intel.com
Subject: Re: [PATCH V5 00/12] perf: Add Icelake support (kernel only, except
 Topdown)



On 4/8/2019 12:06 PM, Liang, Kan wrote:
> @@ -1875,7 +1868,7 @@ static void intel_pmu_drain_pebs_nhm(str
>            counts[bit]++;
>        }
> -    for (bit = 0; bit < size; bit++) {
> +    for_each_set_bit(bit, (unsigned long *)&mask, size) {
>            if ((counts[bit] == 0) && (error[bit] == 0))
>                continue;
> @@ -1939,7 +1932,7 @@ static void intel_pmu_drain_pebs_icl(str
>                counts[bit]++;
>        }
> -    for (bit = 0; bit < size; bit++) {
> +    for_each_set_bit(bit, (unsigned long *)mask, size) {
>            if (counts[bit] == 0)
>                continue;

I have finished the tests for the changes. There is one more regression 
found by another typo on ICL.

Should be "for_each_set_bit(bit, (unsigned long *)&mask, size) {"

Thanks,
Kan