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Message-ID: <877ec4pam2.fsf@linux.ibm.com>
Date: Mon, 08 Apr 2019 16:20:37 -0300
From: Tulio Magno Quites Machado Filho <tuliom@...ii.art.br>
To: Carlos O'Donell <codonell@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
Michael Meissner <meissner@...ux.ibm.com>,
Alan Modra <amodra@...il.com>,
Peter Bergner <bergner@...t.ibm.com>,
Michael Ellerman <mpe@...erman.id.au>
Cc: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
Paul Burton <paul.burton@...s.com>,
Will Deacon <will.deacon@....com>,
Boqun Feng <boqun.feng@...il.com>,
Heiko Carstens <heiko.carstens@...ibm.com>,
Vasily Gorbik <gor@...ux.ibm.com>,
Martin Schwidefsky <schwidefsky@...ibm.com>,
Russell King <linux@...linux.org.uk>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>, carlos <carlos@...hat.com>,
Joseph Myers <joseph@...esourcery.com>,
Szabolcs Nagy <szabolcs.nagy@....com>,
libc-alpha <libc-alpha@...rceware.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ben Maurer <bmaurer@...com>,
Peter Zijlstra <peterz@...radead.org>,
"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
Dave Watson <davejwatson@...com>, Paul Turner <pjt@...gle.com>,
Rich Felker <dalias@...c.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-api <linux-api@...r.kernel.org>
Subject: Re: [PATCH 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v7)
Carlos O'Donell <codonell@...hat.com> writes:
> On 4/5/19 5:16 AM, Florian Weimer wrote:
>> * Carlos O'Donell:
>>> It is valuable that it be a trap, particularly for constant pools because
>>> it means that a jump into the constant pool will trap.
>>
>> Sorry, I don't understand why this matters in this context. Would you
>> please elaborate?
>
> Sorry, I wasn't very clear.
>
> My point is only that any accidental jumps, either with off-by-one (like you
> fixed in gcc/glibc's signal unwinding most recently), result in a process fault
> rather than executing RSEQ_SIG as a valid instruction *and then* continuing
> onwards to the handler.
>
> A process fault is achieved either by a trap, or an invalid instruction, or
> a privileged insn (like suggested for MIPS in this thread).
In that case, mtmsr (Move to Machine State Register) seems a good candidate.
mtmsr is available both on 32 and 64 bits since their first implementations.
It's a privileged instruction and should never appear in userspace
code (causes SIGILL).
Any comments?
--
Tulio Magno
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