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Message-ID: <7771bb01-30a1-4b52-b887-1d6651085c85@gmail.com>
Date:   Tue, 9 Apr 2019 07:30:48 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Will Deacon <will.deacon@....com>
Cc:     linux-kernel@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        "moderated list:ARM PMU PROFILING AND DEBUGGING" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] perf vendor events arm64: Add Cortex-A72 events



On 4/8/2019 9:47 AM, Will Deacon wrote:
> Hi Florian,
> 
> On Sun, Apr 07, 2019 at 02:34:22PM -0700, Florian Fainelli wrote:
>> The Cortex-A72 supports all ARMv8 recommended events up to the
>> RC_ST_SPEC (0x91) event, create an appropriate JSON file for mapping
>> those events and update the mapfile.csv for matching the Cortex-A72 MIDR
>> to that file.
>>
>> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
>> ---
>>  .../arm64/arm/cortex-a72/core-imp-def.json    | 206 ++++++++++++++++++
>>  tools/perf/pmu-events/arch/arm64/mapfile.csv  |   1 +
>>  2 files changed, 207 insertions(+)
>>  create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a72/core-imp-def.json
> 
> It would be worth checking how many of these events are common between a57
> and a72, as they may be able to share much of the json file.

Makes sense, will check the Cortex-A57 TRM and re-submit accordingly.
Thanks!
-- 
Florian

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