linux-kernel - [PATCH V9 0/5] make mt7623 clock of hdmi stable

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Message-ID: <20190409030756.69496-1-wangyan.wang@mediatek.com>
Date:   Tue, 9 Apr 2019 11:07:51 +0800
From:   wangyan wang <wangyan.wang@...iatek.com>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, CK Hu <ck.hu@...iatek.com>
CC:     wangyan wang <wangyan.wang@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        chunhui dai <chunhui.dai@...iatek.com>,
        Colin Ian King <colin.king@...onical.com>,
        Sean Wang <sean.wang@...iatek.com>,
        Ryder Lee <ryder.lee@...iatek.com>,
        <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <dri-devel@...ts.freedesktop.org>, <srv_heupstream@...iatek.com>
Subject: [PATCH V9 0/5] make mt7623 clock of hdmi stable

From: Wangyan Wang <wangyan.wang@...iatek.com>

V9 adopt maintainer's suggestion.
Here is the change list between V8 & V9

1. Align the first character to the right of '(' in
mtk_hdmi_phy_clk_get_data() of "drm/mediatek: remove flag ..."
2. Align the first character to the right of '(' in
mtk_hdmi_pll_recalc_rate() of "drm/mediatek: make implementation ..." 
3. Align the first character to the right of '(' in
mtk_hdmi_pll_round_rate() of "drm/mediatek: no change ..."
4. move patch " drm/mediatek: make implementation ..." before
patch "drm/mediatek: no change parent ..." 
5. To make MT2701 HDMI stable, TVDPLL should not be adjusted and
it's the parent clock of HDMI phy, so HDMI phy could not adjust parent
rate. there are 3 steps to make MT2701 HDMI stable.
    1). remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy to not propagate
rate change to parent in "drm/mediatek: remove flag ...".
    2). Using new factor for tvdpll in mt2701 to match divider of DPI in
mt2701 in "drm/mediatek: using new...".
    3). No change parent rate in round_rate() for mt2701 hdmi phy in
"drm/mediatek: no change parent...".

6. Recalculate the rate of this clock, by querying hardware to
make implementation of recalc_rate() to match the definition.

Wangyan Wang (5):
  drm/mediatek: remove flag CLK_SET_RATE_PARENT for mt2701 hdmi phy
  drm/mediatek: fix the rate and divder of hdmi phy for MT2701
  drm/mediatek: using new factor for tvdpll in MT2701
  drm/mediatek: make implementation of recalc_rate() to match the definition
  drm/mediatek: no change parent rate in round_rate() for mt2701 hdmi phy

 03_27_ck.diff                                  | 91 ++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_dpi.c             |  8 +--
 drivers/gpu/drm/mediatek/mtk_hdmi_phy.c        | 35 ++--------
 drivers/gpu/drm/mediatek/mtk_hdmi_phy.h        |  5 +-
 drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 50 ++++++++++++--
 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 23 +++++++
 patch1.diff                                    | 75 ++++++++++++++++++++
 patch_5_4.diff                                 | 95 ++++++++++++++++++++++++++
 remove_parent_flag.diff                        | 75 ++++++++++++++++++++
 9 files changed, 412 insertions(+), 45 deletions(-)
 create mode 100644 03_27_ck.diff
 create mode 100644 patch1.diff
 create mode 100644 patch_5_4.diff
 create mode 100644 remove_parent_flag.diff

-- 
2.14.1