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Date: Tue, 9 Apr 2019 14:11:58 -0500 From: Thor Thayer <thor.thayer@...ux.intel.com> To: bp@...en8.de, dinguyen@...nel.org, robh+dt@...nel.org, mark.rutland@....com Cc: mchehab@...nel.org, james.morse@....com, devicetree@...r.kernel.org, linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [RESEND PATCHv3 0/3] Update Stratix10 EDAC Bindings Hi Boris, On 4/4/19 9:36 AM, thor.thayer@...ux.intel.com wrote: > From: Thor Thayer <thor.thayer@...ux.intel.com> > > This patch series makes the Stratix10 EDAC Bindings > specific to the Stratix10 ARM64 architecture. > > Instead of using the Arria10 (ARM32) EDAC bindings for > Stratix10 (ARM64), create Stratix10 specific EDAC bindings > to capture architecture differences between ARM32 and ARM64. > This requires fixing the previous Stratix10 bindings. > Also add the peripheral bindings for the Stratix10. > > V2: Remove Stratix10 compatible check. > > V3: Remove patches not related to EDAC bindings so that > this patchset is targeted toward the bindings. > Improve the Stratix10 specific binding description by > adding in descriptions of ARM64 differences. > > Resend: Add Reviewed-by and Acked-by from bindings and > socfpga device tree maintainers. I'd like this to go > through the EDAC tree since future patches will have > a dependency on these bindings and device tree. > > Thor Thayer (3): > Documentation: dt: edac: Fix Stratix10 IRQ bindings > Documentation: dt: edac: Add Stratix10 Peripheral bindings > arm64: dts: stratix10: Use new Stratix10 EDAC bindings > > .../devicetree/bindings/edac/socfpga-eccmgr.txt | 135 +++++++++++++++++++-- > arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 25 ++-- > 2 files changed, 138 insertions(+), 22 deletions(-) > If possible, I'd like this series to go through the EDAC tree since future patches will follow this format. Regards, Thor
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