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Message-ID: <20190410035111.po3dgi5qiu67i652@vireshk-i7>
Date: Wed, 10 Apr 2019 09:21:11 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Rajendra Nayak <rnayak@...eaurora.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-pm@...r.kernel.org, linux-serial@...r.kernel.org,
linux-spi@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-scsi@...r.kernel.org, swboyd@...omium.org,
ulf.hansson@...aro.org, dianders@...omium.org, rafael@...nel.org
Subject: Re: [RFC v2 00/11] DVFS in the OPP core
On 20-03-19, 15:19, Rajendra Nayak wrote:
> This is a v2 of the RFC posted earlier by Stephen Boyd [1]
>
> As part of v2 I still follow the same approach of dev_pm_opp_set_rate()
> API using clk framework to round the frequency passed and making it
> accept 0 as a valid frequency indicating the frequency isn't required
> anymore. It just has a few more drivers converted to use this approach
> like dsi/dpu and ufs.
> ufs demonstrates the case of having to handle multiple power domains, one
> of which is scalable.
I though we discussed about enabling/disabling clk as well from OPP core to
simply driver ? I was expecting that to be part of this version :(
--
viresh
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