linux-kernel - Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

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Date:   Wed, 10 Apr 2019 11:05:06 +0300
From:   Jarkko Nikula <jarkko.nikula@...ux.intel.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Lee Jones <lee.jones@...aro.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1] mfd: intel-lpss: Add Intel Comet Lake PCI IDs

On 4/9/19 6:11 PM, Andy Shevchenko wrote:
> Intel Comet Lake has the same LPSS than Intel Cannon Lake.
> Add the new IDs to the list of supported devices.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
>   drivers/mfd/intel-lpss-pci.c | 13 +++++++++++++
>   1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
> index a67f67c90ec4..50a907f93da9 100644
> --- a/drivers/mfd/intel-lpss-pci.c
> +++ b/drivers/mfd/intel-lpss-pci.c
> @@ -129,6 +129,19 @@ static const struct intel_lpss_platform_info cnl_i2c_info = {
>   };
>   
>   static const struct pci_device_id intel_lpss_pci_ids[] = {
> +	/* CML */
> +	{ PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)&spt_uart_info },
> +	{ PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)&spt_uart_info },
> +	{ PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&spt_info },
> +	{ PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&spt_info },
> +	{ PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02c7), (kernel_ulong_t)&spt_uart_info },
> +	{ PCI_VDEVICE(INTEL, 0x02e8), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02e9), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02ea), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02eb), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)&spt_info },
>   	/* BXT A-Step */
>   	{ PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info },
>   	{ PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info },

Let's hold a bit. I'd like to double check does the I2C controller use 
Skylake or Broxton derived input clocks.

-- 
Jarkko