linux-kernel - Re: [PATCH RESEND 2/5] x86/MCE: Handle MCA controls in a per

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Message-ID: <20190410164036.GC26580@zn.tnic>
Date:   Wed, 10 Apr 2019 18:40:36 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     "Ghannam, Yazen" <Yazen.Ghannam@....com>
Cc:     "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tony.luck@...el.com" <tony.luck@...el.com>,
        "x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH RESEND 2/5] x86/MCE: Handle MCA controls in a per_cpu way

On Wed, Apr 10, 2019 at 04:36:30PM +0000, Ghannam, Yazen wrote:
> We have this case on AMD Family 17h with Bank 4. The hardware enforces
> this bank to be Read-as-Zero/Writes-Ignored.
>
> This behavior is enforced whether the bank is in the middle or at the
> end.

Does num_banks contain the disabled bank? If so, then it will work.

> I'm thinking to redo the sysfs interface for banks in another patch
> set. I could include a new file to indicate enabled/disabled, or maybe
> just update the documentation to describe this case.

No, the write to the bank controls should fail on a disabled bank.

-- 
Regards/Gruss,
    Boris.

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