[<prev] [next>] [day] [month] [year] [list]
Message-ID: <3f4a77a9-0c2a-b3c3-c97e-a3c84df90ef0@cogentembedded.com>
Date: Wed, 10 Apr 2019 20:53:12 +0300
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: masonccyang@...c.com.tw, Marek Vasut <marek.vasut@...il.com>
Cc: bbrezillon@...nel.org, broonie@...nel.org,
devicetree@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>,
Simon Horman <horms@...ge.net.au>, juliensu@...c.com.tw,
lee.jones@...aro.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, linux-spi@...r.kernel.org,
mark.rutland@....com, robh+dt@...nel.org, zhengxunli@...c.com.tw
Subject: Re: [PATCH v9 2/3] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller
driver
Hello!
On 04/10/2019 11:01 AM, masonccyang@...c.com.tw wrote:
>> >> > +static ssize_t rpc_spi_mem_dirmap_write(struct spi_mem_dirmap_desc
>> > *desc,
>> >> > + u64 offs, size_t len, const void *buf)
>> >> > +{
>> >> > + struct rpc_spi *rpc =
>> >> > + spi_controller_get_devdata(desc->mem->spi->controller);
>> >> > + int ret;
>> >> > +
>> >> > + if (offs + desc->info.offset + len > U32_MAX)
>> >> > + return -EINVAL;
>> >> > +
>> >> > + if (len > RPC_WBUF_SIZE)
>> >> > + len = RPC_WBUF_SIZE;
>> >> > +
>> >> > + ret = rpc_spi_set_freq(rpc, desc->mem->spi->max_speed_hz);
>> >> > + if (ret)
>> >> > + return ret;
>> >> > +
>> >> > + rpc_spi_mem_set_prep_op_cfg(desc->mem->spi,
>> >> > + &desc->info.op_tmpl, &offs, &len);
>> >> > +
>> >> > + regmap_update_bits(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD,
>> > RPC_CMNCR_MD);
>> >> > +
>> >> > + regmap_write(rpc->regmap, RPC_SMDRENR, 0);
>> >> > +
>> >> > + regmap_update_bits(rpc->regmap, RPC_PHYCNT, RPC_PHYCNT_STRTIM(7) |
>> >> > + RPC_PHYCNT_WBUF2 | RPC_PHYCNT_WBUF,
>> >> > + RPC_PHYCNT_WBUF2 | RPC_PHYCNT_WBUF);
>> >> > +
>> >> > + memcpy_toio(rpc->wbuf, buf, len);
>> >>
>> >> Wait, doesn't the manual say that the whole 256-byte buffer should be
>> >> filled?
>
> it could be less than 256 bytes, i.e., 128 bytes to rpc->wbuf !
The gen3 manual 1.50 contradicts:
Note: This area should be accessed sequentially from the start address and transfer size
to the device is 256-byte unit. All Write Buffer area should be filled with transfer data
in every transfer. When accessing non-sequentially or at random, the operation is not
guaranteed. After Write Buffer Operation, this cache area must be cleared by DRCR.RCF bit.
> I think that short chunks have to be written w/o WBUF (done,
>> > in fact,
>> >> by the HF driver).
>> >>
>> >
>> > From spi-nor.c layer always transfer 256 bytes data with page program
>> > command.
>>
>> Does that apply even for flashes with not-256-byte pages ?
>>
>
> I think it needs to patch in case of nor->page_size = 512 bytes.
What needs to patch what? :-)
> thanks & best regards,
> Mason
MBR, Sergei
Powered by blists - more mailing lists