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Message-Id: <20190411220230.21726-1-digetx@gmail.com>
Date: Fri, 12 Apr 2019 01:02:25 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Peter De Schrijver <pdeschrijver@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Joseph Lo <josephl@...dia.com>
Cc: linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 0/5] clk: tegra: EMC/MC clock fixes and improvements
Hello, I was helping with fixing EMC clock scaling on T124 Nyan Big and
in process found some weak points in the code. Primarily the ram code
parsing didn't work if device-tree defines memory timings for multiple
ram codes and after fixing that I spotted few other things that could be
improved.
Dmitry Osipenko (5):
clk: tegra: emc: Don't enable EMC clock manually
clk: tegra: emc: Support multiple ram codes parsing
clk: tegra: emc: Fix EMC max-rate clamping
clk: tegra: emc: Replace BUG() with WARN_ONCE()
clk: tegra: divider: Mark Memory Controller clock as read-only
drivers/clk/tegra/clk-divider.c | 5 +--
drivers/clk/tegra/clk-emc.c | 57 ++++++++++++++++++++-------------
2 files changed, 38 insertions(+), 24 deletions(-)
--
2.21.0
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