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Message-ID: <20190411080955.ysp3wreifwqrpn3n@flea>
Date:   Thu, 11 Apr 2019 10:09:55 +0200
From:   Maxime Ripard <maxime.ripard@...tlin.com>
To:     Yangtao Li <tiny.windzz@...il.com>
Cc:     vireshk@...nel.org, nm@...com, sboyd@...nel.org,
        robh+dt@...nel.org, mark.rutland@....com, wens@...e.org,
        rjw@...ysocki.net, davem@...emloft.net, mchehab+samsung@...nel.org,
        gregkh@...uxfoundation.org, nicolas.ferre@...rochip.com,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/2] cpufreq: Add sunxi nvmem based CPU scaling driver

Hi,

On Wed, Apr 10, 2019 at 01:41:38PM -0400, Yangtao Li wrote:
> For some SoCs, the CPU frequency subset and voltage value of each OPP
> varies based on the silicon variant in use. The sunxi-cpufreq-nvmem
> driver reads the efuse value from the SoC to provide the OPP framework
> with required information.
>
> Signed-off-by: Yangtao Li <tiny.windzz@...il.com>

The driver has a bunch of checkpatch warnings, please fix them
(running checkpatch with --strict).

> ---
>  MAINTAINERS                           |   7 +
>  drivers/cpufreq/Kconfig.arm           |  10 ++
>  drivers/cpufreq/Makefile              |   1 +
>  drivers/cpufreq/cpufreq-dt-platdev.c  |   2 +
>  drivers/cpufreq/sunxi-cpufreq-nvmem.c | 232 ++++++++++++++++++++++++++
>  5 files changed, 252 insertions(+)
>  create mode 100644 drivers/cpufreq/sunxi-cpufreq-nvmem.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 391405091c6b..bfd18ba6aa1a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -667,6 +667,13 @@ S:	Maintained
>  F:	Documentation/i2c/busses/i2c-ali1563
>  F:	drivers/i2c/busses/i2c-ali1563.c
>
> +ALLWINNER CPUFREQ DRIVER
> +M:	Yangtao Li <tiny.windzz@...il.com>
> +L:	linux-pm@...r.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> +F:	drivers/cpufreq/sunxi-cpufreq-nvmem.c
> +

Please use a less generic name for the driver as well. It's called
sunxi, but applies to a single SoC (for now).

> +struct sunxi_cpufreq_soc_data {
> +	u32 (*efuse_xlate)(const struct sunxi_cpufreq_soc_data *soc_data,
> +			   u32 efuse);
> +	u32 nvmem_mask;
> +	u32 nvmem_shift;
> +};

What cases do you have? You're mentionning that it might apply to more
SoCs, which ones? How is the data stored on those SoCs (and why do you
need this particular abstraction)?

Thanks!
Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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