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Date:   Thu, 11 Apr 2019 15:33:31 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     mingo@...hat.com, linux-kernel@...r.kernel.org, tglx@...utronix.de,
        acme@...nel.org, jolsa@...nel.org, eranian@...gle.com,
        alexander.shishkin@...ux.intel.com, ak@...ux.intel.com
Subject: Re: [PATCH V2 2/2] perf/x86/intel: Add Tremont core PMU support

On Thu, Apr 11, 2019 at 09:30:10AM -0400, Liang, Kan wrote:

> > I changed that like so:
> > 
> > --- a/arch/x86/events/intel/core.c
> > +++ b/arch/x86/events/intel/core.c
> > @@ -3508,7 +3508,7 @@ tnt_get_event_constraints(struct cpu_hw_
> >   	 */
> >   	if (event->attr.precise_ip == 3) {
> >   		/* Force instruction:ppp on PMC0 and Fixed counter 0 */
> > -		if (EVENT_CONFIG(event->hw.config) == X86_CONFIG(.event=0xc0))
> > +		if (constraint_match(&fixed_counter0_constraint, event->hw.config))
> 
> Should be
> 	if (constraint_match(&fixed0_counter0_constraint, event->hw.config))

No, because fixed0_counter0_constraint doesn't set an event.

The logic as I proposed checks if it fits the fixed0 constraint, and if
so, allows f0-c0, otherwise only c0.

> >   			return &fixed0_counter0_constraint;
> >   		return &counter0_constraint;
> > 

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