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Message-ID: <20190412083635.33626-11-Zhiqiang.Hou@nxp.com> Date: Fri, 12 Apr 2019 08:36:12 +0000 From: "Z.q. Hou" <zhiqiang.hou@....com> To: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "robh+dt@...nel.org" <robh+dt@...nel.org>, "mark.rutland@....com" <mark.rutland@....com>, "l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>, "shawnguo@...nel.org" <shawnguo@...nel.org>, Leo Li <leoyang.li@....com>, "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>, "catalin.marinas@....com" <catalin.marinas@....com>, "will.deacon@....com" <will.deacon@....com> CC: Mingkai Hu <mingkai.hu@....com>, "M.h. Lian" <minghuan.lian@....com>, Xiaowei Bao <xiaowei.bao@....com>, "Z.q. Hou" <zhiqiang.hou@....com> Subject: [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors From: Hou Zhiqiang <Zhiqiang.Hou@....com> In the loop block, there is not code to update the loop key, this patch updates the loop key by re-read the INTx status register. This patch also add the clearing of the handled INTx status. Note: Need MV to test this fix. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com> Reviewed-by: Minghuan Lian <Minghuan.Lian@....com> Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@...iveil.co.in> --- V5: - Corrected and retouched the subject and changelog. drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4ba458474e42..78e575e71f4d 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */ -- 2.17.1
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