linux-kernel - Re: [PATCH v3 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll

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Message-ID: <1555084180.11529.27.camel@pengutronix.de>
Date:   Fri, 12 Apr 2019 17:49:40 +0200
From:   Lucas Stach <l.stach@...gutronix.de>
To:     Andrey Smirnov <andrew.smirnov@...il.com>,
        linux-pci@...r.kernel.org
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Chris Healy <cphealy@...il.com>,
        Leonard Crestez <leonard.crestez@....com>,
        "A.s. Dong" <aisheng.dong@....com>,
        Richard Zhu <hongxing.zhu@....com>, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 01/11] PCI: imx6: Simplify
 imx7d_pcie_wait_for_phy_pll_lock()

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Make use of regmap_read_poll_timeout() to simplify
> imx7d_pcie_wait_for_phy_pll_lock(). No functional change intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
> > Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> > Cc: Fabio Estevam <fabio.estevam@....com>
> > Cc: Chris Healy <cphealy@...il.com>
> > Cc: Lucas Stach <l.stach@...gutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@....com>
> > Cc: "A.s. Dong" <aisheng.dong@....com>
> > Cc: Richard Zhu <hongxing.zhu@....com>
> Cc: linux-imx@....com
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> Cc: linux-pci@...r.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>

Reviewed-by: Lucas Stach <l.stach@...gutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 21 +++++++--------------
>  1 file changed, 7 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 2eb39d5de4f6..fb0b29e5b1f0 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -89,9 +89,8 @@ struct imx6_pcie {
>  };
>  
>  /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
> > -#define PHY_PLL_LOCK_WAIT_MAX_RETRIES	2000
> > -#define PHY_PLL_LOCK_WAIT_USLEEP_MIN	50
> >  #define PHY_PLL_LOCK_WAIT_USLEEP_MAX	200
> > +#define PHY_PLL_LOCK_WAIT_TIMEOUT	(2000 * PHY_PLL_LOCK_WAIT_USLEEP_MAX)
>  
>  /* PCIe Root Complex registers (memory-mapped) */
> >  #define PCIE_RC_IMX6_MSI_CAP			0x50
> @@ -488,20 +487,14 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
>  static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
>  {
> >  	u32 val;
> > -	unsigned int retries;
> >  	struct device *dev = imx6_pcie->pci->dev;
>  
> > -	for (retries = 0; retries < PHY_PLL_LOCK_WAIT_MAX_RETRIES; retries++) {
> > -		regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR22, &val);
> -
> > -		if (val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED)
> > -			return;
> -
> > -		usleep_range(PHY_PLL_LOCK_WAIT_USLEEP_MIN,
> > -			     PHY_PLL_LOCK_WAIT_USLEEP_MAX);
> > -	}
> -
> > -	dev_err(dev, "PCIe PLL lock timeout\n");
> > +	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,
> > +				     IOMUXC_GPR22, val,
> > +				     val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED,
> > +				     PHY_PLL_LOCK_WAIT_USLEEP_MAX,
> > +				     PHY_PLL_LOCK_WAIT_TIMEOUT))
> > +		dev_err(dev, "PCIe PLL lock timeout\n");
>  }
>  
>  static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)