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Date: Fri, 12 Apr 2019 20:19:30 +0200 From: Peter Zijlstra <peterz@...radead.org> To: Nadav Amit <namit@...are.com> Cc: kernel test robot <lkp@...el.com>, LKP <lkp@...org>, Linux List Kernel Mailing <linux-kernel@...r.kernel.org>, Linux-MM <linux-mm@...ck.org>, linux-arch <linux-arch@...r.kernel.org>, Ingo Molnar <mingo@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Will Deacon <will.deacon@....com>, Andy Lutomirski <luto@...nel.org>, Linus Torvalds <torvalds@...ux-foundation.org>, Dave Hansen <dave.hansen@...el.com> Subject: Re: 1808d65b55 ("asm-generic/tlb: Remove arch_tlb*_mmu()"): BUG: KASAN: stack-out-of-bounds in __change_page_attr_set_clr On Fri, Apr 12, 2019 at 03:11:22PM +0000, Nadav Amit wrote: > > On Apr 12, 2019, at 4:17 AM, Peter Zijlstra <peterz@...radead.org> wrote: > > To clarify, 'that' is Nadav's patch: > > > > 515ab7c41306 ("x86/mm: Align TLB invalidation info") > > > > which turns out to be the real problem. > > Sorry for that. I still think it should be aligned, especially with all the > effort the Intel puts around to avoid bus-locking on unaligned atomic > operations. No atomics anywhere in sight, so that's not a concern. > So the right solution seems to me as putting this data structure off stack. > It would prevent flush_tlb_mm_range() from being reentrant, so we can keep a > few entries for this matter and atomically increase the entry number every > time we enter flush_tlb_mm_range(). > > But my question is - should flush_tlb_mm_range() be reentrant, or can we > assume no TLB shootdowns are initiated in interrupt handlers and #MC > handlers? There _should_ not be, but then don't look at those XPFO patches that were posted (they're broken anyway).
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