linux-kernel - Re: [PATCH 2/3] riscv: Add support for perf registers sampling

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Message-ID: <20190413080158.GA3891@infradead.org>
Date:   Sat, 13 Apr 2019 01:01:58 -0700
From:   Christoph Hellwig <hch@...radead.org>
To:     Mao Han <han_mao@...ky.com>
Cc:     Christoph Hellwig <hch@...radead.org>,
        linux-kernel@...r.kernel.org, guoren@...nel.org
Subject: Re: [PATCH 2/3] riscv: Add support for perf registers sampling

On Fri, Apr 12, 2019 at 05:38:53PM +0800, Mao Han wrote:
> > 
> > > +	fp = user_backtrace(entry, fp, regs->ra);
> > > +	while ((entry->nr < entry->max_stack) &&
> > > +		fp && !((unsigned long)fp & 0x3))
> > > +		fp = user_backtrace(entry, fp, 0);
> > 
> > Please don't indent the condition continuation and the loop body
> > by the same amount.
> 
> Like this?
> 	while ((entry->nr < entry->max_stack) &&
> 					fp && !((unsigned long)fp & 0x3))
> 		fp = user_backtrace(entry, fp, 0);

We tend to either use indentations to the same level as the condition,
or two tabs indents.  But I also noticed that we shouldn't even need
the cast here as fp already is unsigned long, so it should all fit on
one line anyway:

	while (fp && !(fp & 0x3) && entry->nr < entry->max_stack)
		fp = user_backtrace(entry, fp, 0);