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Date: Mon, 15 Apr 2019 20:58:33 +0800 From: Bibby Hsieh <bibby.hsieh@...iatek.com> To: Jassi Brar <jassisinghbrar@...il.com>, Matthias Brugger <matthias.bgg@...il.com>, Rob Herring <robh+dt@...nel.org>, CK HU <ck.hu@...iatek.com> CC: Daniel Kurtz <djkurtz@...omium.org>, Sascha Hauer <s.hauer@...gutronix.de>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <linux-mediatek@...ts.infradead.org>, <srv_heupstream@...iatek.com>, Sascha Hauer <kernel@...gutronix.de>, Philipp Zabel <p.zabel@...gutronix.de>, Nicolas Boichat <drinkcat@...omium.org>, Bibby Hsieh <bibby.hsieh@...iatek.com>, YT Shen <yt.shen@...iatek.com>, Daoyuan Huang <daoyuan.huang@...iatek.com>, Jiaguang Zhang <jiaguang.zhang@...iatek.com>, Dennis-YC Hsieh <dennis-yc.hsieh@...iatek.com>, Houlong Wei <houlong.wei@...iatek.com>, <ginny.chen@...iatek.com>, <kendrick.hsu@...iatek.com>, Frederic Chen <Frederic.Chen@...iatek.com> Subject: [PATCH v4 12/12] arm64: dts: add gce node for mt8183 add gce device node for mt8183 Signed-off-by: Bibby Hsieh <bibby.hsieh@...iatek.com> --- This patch is based on v5.1-rc1 and these patches: https://patchwork.kernel.org/patch/10856987/ https://patchwork.kernel.org/patch/10839021/ https://patchwork.kernel.org/patch/10879015/ https://patchwork.kernel.org/patch/10878999/ https://patchwork.kernel.org/patch/10858941/ https://patchwork.kernel.org/patch/10846685/ https://patchwork.kernel.org/patch/10893519/ --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b36e37fcdfe3..60809490a74b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/mt8183-power.h> +#include <dt-bindings/gce/mt8183-gce.h> #include "mt8183-pinfunc.h" / { compatible = "mediatek,mt8183"; @@ -293,6 +294,17 @@ clock-names = "spi", "wrap"; }; + gce: gce@...38000 { + compatible = "mediatek,mt8183-gce"; + reg = <0 0x10238000 0 0x4000>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; + #mbox-cells = <3>; + #gce-event-cells = <1>; + #gce-subsys-cells = <3>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@...02000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart"; -- 2.18.0
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