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Message-Id: <20190416215351.242246-4-dianders@chromium.org>
Date: Tue, 16 Apr 2019 14:53:50 -0700
From: Douglas Anderson <dianders@...omium.org>
To: Rob Herring <robh+dt@...nel.org>,
Minas Harutyunyan <hminas@...opsys.com>,
Heiko Stuebner <heiko@...ech.de>,
Felipe Balbi <felipe.balbi@...ux.intel.com>
Cc: amstan@...omium.org, linux-rockchip@...ts.infradead.org,
linux-usb@...r.kernel.org, Randy Li <ayaka@...lik.info>,
mka@...omium.org, ryandcase@...omium.org, jwerner@...omium.org,
Elaine Zhang <zhangqing@...k-chips.com>,
Douglas Anderson <dianders@...omium.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Mark Rutland <mark.rutland@....com>,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v2 3/4] ARM: dts: rockchip: Hook resets up to USB PHYs on rk3288.
Let's hook up the resets to the three USB PHYs on rk3288 as per the
bindings. This is in preparation for a future patch that will set the
"snps,reset-phy-on-wake" on the host port.
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 74c9517c4f92..7e70ecf2b95a 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -909,6 +909,8 @@
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
#clock-cells = <0>;
+ resets = <&cru SRST_USBOTG_PHY>;
+ reset-names = "phy-reset";
};
usbphy1: usb-phy@334 {
@@ -917,6 +919,8 @@
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
#clock-cells = <0>;
+ resets = <&cru SRST_USBHOST0_PHY>;
+ reset-names = "phy-reset";
};
usbphy2: usb-phy@348 {
@@ -925,6 +929,8 @@
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
#clock-cells = <0>;
+ resets = <&cru SRST_USBHOST1_PHY>;
+ reset-names = "phy-reset";
};
};
};
--
2.21.0.593.g511ec345e18-goog
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