linux-kernel - Re: [PATCH] clk: ingenic/jz4725b: Fix parent of pixel clock

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Message-ID: <155554493444.15276.2577888773542833089@swboyd.mtv.corp.google.com>
Date:   Wed, 17 Apr 2019 16:48:54 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Michael Turquette <mturquette@...libre.com>,
        Paul Cercueil <paul@...pouillou.net>
Cc:     linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Paul Cercueil <paul@...pouillou.net>, stable@...r.kernel.org
Subject: Re: [PATCH] clk: ingenic/jz4725b: Fix parent of pixel clock

Quoting Paul Cercueil (2019-04-17 04:24:20)
> The pixel clock is directly connected to the output of the PLL, and not
> to the /2 divider.
> 
> Cc: stable@...r.kernel.org
> Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")
> Signed-off-by: Paul Cercueil <paul@...pouillou.net>
> ---

Is this breaking something in 5.1-rc series? Or just found by
inspection? I'm trying to understand the priority of this patch.