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Message-ID: <1555480028.3515.4.camel@mtksdaap41>
Date: Wed, 17 Apr 2019 13:47:08 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Frank Wunderlich <frank-w@...lic-files.de>
CC: Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Matthias Brugger <matthias.bgg@...il.com>,
<dri-devel@...ts.freedesktop.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
"Mark Rutland" <mark.rutland@....com>,
<devicetree@...r.kernel.org>,
chunhui dai <chunhui.dai@...iatek.com>,
Ryder Lee <ryder.lee@...iatek.com>,
Bibby Hsieh <bibby.hsieh@...iatek.com>
Subject: Re: [PATCH v1 3/4] drm/mediatek: fix boot up for 720 and 480 but
1080
Hi, Frank:
On Tue, 2019-04-16 at 16:58 +0200, Frank Wunderlich wrote:
> From: chunhui dai <chunhui.dai@...iatek.com>
>
> - 1080 plg in/out with ng/ok
> - support other resolutions like 1280x1024
The description is so simple and I could not understand why
pll_default_off could fix this problem. And why only MT2701 has this
problem? Please describe more clear about this patch.
Regards,
CK
>
> Signed-off-by: chunhui dai <chunhui.dai@...iatek.com>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> Tested-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
> drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 3 +++
> drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 1 +
> drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 1 +
> 3 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> index 5223498502c4..edadb7a700f1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c
> @@ -184,6 +184,9 @@ static int mtk_hdmi_phy_probe(struct platform_device *pdev)
> return PTR_ERR(phy_provider);
> }
>
> + if (hdmi_phy->conf->pll_default_off)
> + hdmi_phy->conf->hdmi_phy_disable_tmds(hdmi_phy);
> +
> return of_clk_add_provider(dev->of_node, of_clk_src_simple_get,
> hdmi_phy->pll);
> }
> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> index 2d8b3182470d..f472fdeb63dc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h
> @@ -22,6 +22,7 @@ struct mtk_hdmi_phy;
> struct mtk_hdmi_phy_conf {
> bool tz_disabled;
> unsigned long flags;
> + bool pll_default_off;
> const struct clk_ops *hdmi_phy_clk_ops;
> void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
> void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> index d3cc4022e988..6fbedacfc1e8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> @@ -239,6 +239,7 @@ static void mtk_hdmi_phy_disable_tmds(struct mtk_hdmi_phy *hdmi_phy)
> struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf = {
> .tz_disabled = true,
> .flags = CLK_SET_RATE_GATE,
> + .pll_default_off = true,
> .hdmi_phy_clk_ops = &mtk_hdmi_phy_pll_ops,
> .hdmi_phy_enable_tmds = mtk_hdmi_phy_enable_tmds,
> .hdmi_phy_disable_tmds = mtk_hdmi_phy_disable_tmds,
> --
> 2.17.1
>
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