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Message-ID: <VI1PR04MB5533BF028703707A956DAEA7EE260@VI1PR04MB5533.eurprd04.prod.outlook.com>
Date: Thu, 18 Apr 2019 22:01:24 +0000
From: Leonard Crestez <leonard.crestez@....com>
To: Lucas Stach <l.stach@...gutronix.de>,
Abel Vesa <abel.vesa@....com>, Peng Fan <peng.fan@....com>
CC: Anson Huang <anson.huang@....com>,
dl-linux-imx <linux-imx@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Fabio Estevam <fabio.estevam@....com>, Ye Li <ye.li@....com>,
"robh@...nel.org" <robh@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>
Subject: Re: [RESEND v2] soc: imx: Add generic i.MX8 SoC driver
On 3/28/2019 6:43 PM, Leonard Crestez wrote:
> On Fri, 2019-03-22 at 16:49 +0000, Abel Vesa wrote:
>> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
>> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
>> revision it will print 'unknown'.
>
>> +#define REV_B1 0x21
>> +
>> +#define IMX8MQ_SW_INFO_B1 0x40
>> +#define IMX8MQ_SW_MAGIC_B1 0xff0055aa
>> +
>> + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp");+
>> + ocotp_base = of_iomap(np, 0);
>> +
>> + magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1);
>> + if (magic == IMX8MQ_SW_MAGIC_B1)
>> + rev = REV_B1;
>
> This is based on ATF code in vendor tree, but shouldn't we have some
> sort of explanation for this "magic"?
>
> Looking at the OCOTP driver reg 0x40 is IMX_OCOTP_ADDR_DATA2 and it's
> used as part of fuse writes. According to the driver code 8mq is
> compatible with 7d and this write path is enabled for imx8mq-ocotp.
After further digging in NXP manuals and uboot sources it seems that
imx8mq ocotp is like imx6 rather than imx7. Posted fix for nvmem driver:
https://patchwork.kernel.org/patch/10908081/
Reviewed-by: Leonard Crestez <leonard.crestez@....com>
It might still be nice to find a way to identify imx8mq B0.
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