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Message-ID: <20190422155333.GB32647@char.us.oracle.com>
Date: Mon, 22 Apr 2019 11:53:33 -0400
From: Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>
To: Like Xu <like.xu@...ux.intel.com>
Cc: kvm@...r.kernel.org, Paolo Bonzini <pbonzini@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Len Brown <lenb@...nel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] KVM: x86: Add Intel CPUID.1F cpuid emulation support
On Mon, Apr 22, 2019 at 02:40:34PM +0800, Like Xu wrote:
> Expose Intel V2 Extended Topology Enumeration Leaf to guest only when
> host system has multiple software-visible die within each package.
Is there some doc on this?
The https://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration
has a date of 2012.
>
> Signed-off-by: Like Xu <like.xu@...ux.intel.com>
> ---
> arch/x86/kvm/cpuid.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index fd39516..9fc14f2 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -65,6 +65,16 @@ u64 kvm_supported_xcr0(void)
> return xcr0;
> }
>
> +/* We need to check if the host cpu has multi-chip packaging technology. */
> +static bool kvm_supported_intel_mcp(void)
> +{
> + u32 eax, ignored;
> +
> + cpuid_count(0x1f, 0, &eax, &ignored, &ignored, &ignored);
> +
> + return boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && (eax != 0);
> +}
> +
> #define F(x) bit(X86_FEATURE_##x)
>
> int kvm_update_cpuid(struct kvm_vcpu *vcpu)
> @@ -426,6 +436,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> switch (function) {
> case 0:
> entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd));
> + entry->eax = kvm_supported_intel_mcp() ? 0x1f : entry->eax;
> break;
> case 1:
> entry->edx &= kvm_cpuid_1_edx_x86_features;
> @@ -544,6 +555,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> entry->edx = edx.full;
> break;
> }
> + /* function 0x1f has additional index. */
> + case 0x1f:
> /* function 0xb has additional index. */
> case 0xb: {
> int i, level_type;
> --
> 1.8.3.1
>
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