linux-kernel - Re: [PATCH] Documentation: atomic_t.txt: Explain ordering provided by smp_mb__{before,after}

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Message-ID: <20190423132620.GU4038@hirez.programming.kicks-ass.net>
Date:   Tue, 23 Apr 2019 15:26:20 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Paul E. McKenney" <paulmck@...ux.ibm.com>
Cc:     Nicholas Piggin <npiggin@...il.com>,
        LKMM Maintainers -- Akira Yokosawa <akiyks@...il.com>,
        Andrea Parri <andrea.parri@...rulasolutions.com>,
        Boqun Feng <boqun.feng@...il.com>,
        David Howells <dhowells@...hat.com>,
        Daniel Lustig <dlustig@...dia.com>,
        Jade Alglave <j.alglave@....ac.uk>,
        Kernel development list <linux-kernel@...r.kernel.org>,
        Luc Maranget <luc.maranget@...ia.fr>,
        Alan Stern <stern@...land.harvard.edu>,
        Will Deacon <will.deacon@....com>
Subject: Re: [PATCH] Documentation: atomic_t.txt: Explain ordering provided
 by smp_mb__{before,after}_atomic()

On Tue, Apr 23, 2019 at 06:21:16AM -0700, Paul E. McKenney wrote:
> On Tue, Apr 23, 2019 at 02:17:15PM +0200, Peter Zijlstra wrote:
> > On Sat, Apr 20, 2019 at 01:54:40AM -0700, Paul E. McKenney wrote:
> > > 3.	Make non-value-returning atomics provide full ordering.
> > > 	This would of course need some benchmarking, but would be a
> > > 	simple change to make and would eliminate a large class of
> > > 	potential bugs.  My guess is that the loss in performance
> > > 	would be non-negligible, but who knows?
> > 
> > Well, only for the architectures that have
> > smp_mb__{before,after}_atomic() as barrier(), which are: ia64, mips,
> > s390, sparc, x86 and xtense.
> 
> The weakly ordered architectures would need to add the equivalent of
> smp_mb() before and after, right?  This might result in a more noticeable
> loss of performance.

The weak archs already have: smp_mb__{before,after}_atomic() :=
smp_mb().