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Message-ID: <20190424163557.GA20110@ravnborg.org>
Date:   Wed, 24 Apr 2019 18:35:57 +0200
From:   Sam Ravnborg <sam@...nborg.org>
To:     John Stultz <john.stultz@...aro.org>
Cc:     lkml <linux-kernel@...r.kernel.org>,
        David Airlie <airlied@...ux.ie>,
        Chen Feng <puck.chen@...ilicon.com>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        Xinliang Liu <z.liuxinliang@...ilicon.com>,
        Rongrong Zou <zourongrong@...il.com>,
        Xinwei Kong <kong.kongxinwei@...ilicon.com>,
        Da Lv <lvda3@...ilicon.com>, Yidong Lin <linyidong@...wei.com>
Subject: Re: [PATCH 01/25] drm: kirin: Fix for hikey620 display offset problem

Hi John.

On Tue, Apr 23, 2019 at 04:20:32PM -0700, John Stultz wrote:
> From: Da Lv <lvda3@...ilicon.com>
> 
> The original HiKey (620) board has had a long running issue
> where when using a 1080p montior, the display would occasionally
> blink and come come back with a horizontal offset (usually also
> shifting the colors, depending on the value of the offset%4).
> 
> After lots of analysis by HiSi developers, they found the issue
> was due to when running at 1080p, it was possible to hit the
> device memory bandwidth limits, which could cause the DSI signal
> to get out of sync.
> 
> Unfortunately the DSI logic doesn't have the ability to
> automatically recover from this situation, but we can get a an
> LDI underflow interrupt when it happens.
> 
> To then correct the issue, when we get an LDI underflow irq, we
> we can simply suspend and resume the display, which resets the
> hardware.
> 
> Thus, this patch enables the ldi underflow interrupt, and
> initializes a workqueue that is used to suspend/resume the
> display to recover. Then when the irq occurs we clear it and
> schedule the workqueue to reset display engine.
> 
> Cc: Xinliang Liu <z.liuxinliang@...ilicon.com>
> Cc: Rongrong Zou <zourongrong@...il.com>
> Cc: Xinwei Kong <kong.kongxinwei@...ilicon.com>
> Cc: Chen Feng <puck.chen@...ilicon.com>
> Cc: David Airlie <airlied@...ux.ie>
> Cc: Daniel Vetter <daniel@...ll.ch>
> Cc: dri-devel <dri-devel@...ts.freedesktop.org>
> Signed-off-by: Da Lv <lvda3@...ilicon.com>
> Signed-off-by: Yidong Lin <linyidong@...wei.com>
> [jstultz: Reworded the commit message, checkpatch cleanups]
> Signed-off-by: John Stultz <john.stultz@...aro.org>
> ---
> v2: Minor cleanups
> ---
>  drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h |  6 ++++++
>  drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 22 ++++++++++++++++++++++
>  2 files changed, 28 insertions(+)
> 
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
> index 4cf281b7..ced40c6 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h
> @@ -87,6 +87,7 @@
>  #define VSIZE_OFST			20
>  #define LDI_INT_EN			0x741C
>  #define FRAME_END_INT_EN_OFST		1
> +#define UNDERFLOW_INT_EN_OFST		2
>  #define LDI_CTRL			0x7420
>  #define BPP_OFST			3
>  #define DATA_GATE_EN			BIT(2)
> @@ -97,6 +98,11 @@
>  #define LDI_HDMI_DSI_GT			0x7434
>  
>  /*
> + *BIT_LDI_UNFLOW
> + */
> +#define BIT_LDI_UNFLOW         BIT(2)

The definition of this bit looks not like anything surrounding it.
And it is not obvious that this bit is part of LDI_MSK_INT.
Consider to reformat this so it is obvious where this bit belongs
when reading the .h file.


> +
> +/*
>   * ADE media bus service regs
>   */
>  #define ADE0_QOSGENERATOR_MODE		0x010C
> diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> index 73611a9..beb2a3c 100644
> --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
> @@ -58,6 +58,7 @@ struct ade_hw_ctx {
>  struct ade_crtc {
>  	struct drm_crtc base;
>  	struct ade_hw_ctx *ctx;
> +	struct work_struct drm_device_wq;
>  	bool enable;
>  	u32 out_format;
>  };
> @@ -176,6 +177,7 @@ static void ade_init(struct ade_hw_ctx *ctx)
>  	 */
>  	ade_update_bits(base + ADE_CTRL, FRM_END_START_OFST,
>  			FRM_END_START_MASK, REG_EFFECTIVE_IN_ADEEN_FRMEND);
> +	ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1);
>  }
>  
>  static bool ade_crtc_mode_fixup(struct drm_crtc *crtc,
> @@ -345,6 +347,17 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc)
>  			MASK(1), 0);
>  }
>  
> +static void drm_underflow_wq(struct work_struct *work)
> +{
> +	struct ade_crtc *acrtc = container_of(work, struct ade_crtc,
> +					      drm_device_wq);
> +	struct drm_device *drm_dev = (&acrtc->base)->dev;
> +	struct drm_atomic_state *state;
> +
> +	state = drm_atomic_helper_suspend(drm_dev);
> +	drm_atomic_helper_resume(drm_dev, state);
> +}
> +
>  static irqreturn_t ade_irq_handler(int irq, void *data)
>  {
>  	struct ade_crtc *acrtc = data;
> @@ -362,6 +375,12 @@ static irqreturn_t ade_irq_handler(int irq, void *data)
>  				MASK(1), 1);
>  		drm_crtc_handle_vblank(crtc);
>  	}
> +	if (status & BIT_LDI_UNFLOW) {
> +		ade_update_bits(base + LDI_INT_CLR, UNDERFLOW_INT_EN_OFST,
> +				MASK(1), 1);
A general comment here.
It is not obvious from reading this code that the code will clear
LDI_UNFLOW bit in the LDI_INT_CLR register.

I think this driver could see readability improvements
if converted to use regmaps.

	Sam

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