linux-kernel - Re: [PATCH 2/2] gpio: sch: Add interrupt support

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Message-ID: <1200464b-f969-ebc2-ae82-1f8ca98aaca1@siemens.com>
Date:   Wed, 24 Apr 2019 12:19:02 +0200
From:   Jan Kiszka <jan.kiszka@...mens.com>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-gpio@...r.kernel.org, linux-acpi@...r.kernel.org,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>
Subject: Re: [PATCH 2/2] gpio: sch: Add interrupt support

On 24.04.19 12:01, Mika Westerberg wrote:
> On Wed, Apr 24, 2019 at 11:48:09AM +0200, Jan Kiszka wrote:
>> On 24.04.19 11:45, Mika Westerberg wrote:
>>> On Wed, Apr 24, 2019 at 11:36:58AM +0200, Jan Kiszka wrote:
>>>> OK, there is that table, but what is it supposed to tell me about the
>>>> event and where to hook into it better?
>>> ...
>>>> [02Eh 0046   2]                SCI Interrupt : 0009
>>>
>>> This is the SCI interrupt GSI number. IIRC it maps 1:1 to Linux
>>> interrupt number so you should see it in /proc/interrupts. When a GPE
>>> event is triggered it should be handled in the ACPI core.
>>>
>>
>> Yes, clear, all this happens already. But I need to link the core with the
>> sch gpio handler so that the gpio event is filtered out and the right
>> virtual gpio interrupt is triggered. So, other than
>> acpi_install_sci_handler, how should I establish that link?
> 
> I think what you want is "GPIO signaled ACPI event". It works so that
> you declare _AEI method below the GPIO controller listing the GPIOs you
> want to trigger events for and then either _Lxx, _Exx or _EVT method for
> each of them under the same controller. GPIO core then handles it
> automatically when you register the GPIO chip. See also
> acpi_gpiochip_request_interrupts().
> 

Right, that is was I read as well. Let's assume I would be able to patch the 
tables: Would I describe all the logic of this patch in ACPI terms? Where to 
enable interrupts, how to dispatch the SCI event, how to acknowledge it etc.? 
Will it also take care of locking? (BTW, my locking seems to have some remaining 
inconsistency, on second look.)

And even if that were possible, we would be back to the square of existing 
devices without those definitions. If this were a recent chipset, I would say, 
"go, fix future firmware versions". But this one is legacy.

Jan

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