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Message-Id: <20190425154122.24122-2-sergio.paracuellos@gmail.com>
Date:   Thu, 25 Apr 2019 17:41:21 +0200
From:   Sergio Paracuellos <sergio.paracuellos@...il.com>
To:     kishon@...com
Cc:     linux-kernel@...r.kernel.org,
        driverdev-devel@...uxdriverproject.org, devicetree@...r.kernel.org,
        john@...ozen.org, linux-mips@...r.kernel.org, robh+dt@...nel.org,
        neil@...wn.name
Subject: [PATCH v3 1/2] dt-bindings: phy: Add binding for Mediatek MT7621 PCIe PHY

Add bindings to describe Mediatek MT7621 PCIe PHY.

Reviewed-by: Rob Herring <robh@...nel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
---
 .../bindings/phy/mediatek,mt7621-pci-phy.txt  | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt

diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt
new file mode 100644
index 000000000000..a369d715378b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt
@@ -0,0 +1,28 @@
+Mediatek Mt7621 PCIe PHY
+
+Required properties:
+- compatible: must be "mediatek,mt7621-pci-phy"
+- reg: base address and length of the PCIe PHY block
+- #phy-cells: must be <1> for pcie0_phy and for pcie1_phy.
+
+Example:
+	pcie0_phy: pcie-phy@...49000 {
+		compatible = "mediatek,mt7621-pci-phy";
+		reg = <0x1e149000 0x0700>;
+		#phy-cells = <1>;
+	};
+
+	pcie1_phy: pcie-phy@...4a000 {
+		compatible = "mediatek,mt7621-pci-phy";
+		reg = <0x1e14a000 0x0700>;
+		#phy-cells = <1>;
+	};
+
+	/* users of the PCIe phy */
+
+	pcie: pcie@...40000 {
+		...
+		...
+		phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>;
+		phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
+	};
-- 
2.19.1

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