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Date:   Sat, 27 Apr 2019 16:13:09 +0100
From:   Ben Hutchings <ben@...adent.org.uk>
To:     linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC:     akpm@...ux-foundation.org, Denis Kirjanov <kda@...ux-powerpc.org>,
        "Paul Burton" <paul.burton@...s.com>, linux-mips@...r.kernel.org,
        "YunQiang Su" <ysu@...ecomp.com>, aaro.koskinen@....fi,
        pburton@...ecomp.com
Subject: [PATCH 3.16 029/202] Disable MSI also when pcie-octeon.pcie_disable
 on

3.16.66-rc1 review patch.  If anyone has any objections, please let me know.

------------------

From: YunQiang Su <ysu@...ecomp.com>

commit a214720cbf50cd8c3f76bbb9c3f5c283910e9d33 upstream.

Octeon has an boot-time option to disable pcie.

Since MSI depends on PCI-E, we should also disable MSI also with
this option is on in order to avoid inadvertently accessing PCIe
registers.

Signed-off-by: YunQiang Su <ysu@...ecomp.com>
Signed-off-by: Paul Burton <paul.burton@...s.com>
Cc: pburton@...ecomp.com
Cc: linux-mips@...r.kernel.org
Cc: aaro.koskinen@....fi
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
---
 arch/mips/pci/msi-octeon.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -371,7 +371,9 @@ int __init octeon_msi_initialize(void)
 	int irq;
 	struct irq_chip *msi;
 
-	if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) {
+	if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_INVALID) {
+		return 0;
+	} else if (octeon_dma_bar_type == OCTEON_DMA_BAR_TYPE_PCIE) {
 		msi_rcv_reg[0] = CVMX_PEXP_NPEI_MSI_RCV0;
 		msi_rcv_reg[1] = CVMX_PEXP_NPEI_MSI_RCV1;
 		msi_rcv_reg[2] = CVMX_PEXP_NPEI_MSI_RCV2;

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