[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4c5ca6d7-ffb1-a5a5-9e46-9057802318e0@intel.com>
Date: Mon, 29 Apr 2019 09:24:12 +0800
From: "Zhao, Yakui" <yakui.zhao@...el.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Ingo Molnar <mingo@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"Chen, Jason CJ" <jason.cj.chen@...el.com>
Subject: Re: [RFC PATCH v5 4/4] x86/acrn: Add hypercall for ACRN guest
On 2019年04月28日 18:03, Borislav Petkov wrote:
> On Sun, Apr 28, 2019 at 09:56:35AM +0800, Zhao, Yakui wrote:
>> Thanks for the reminder about the access width.
>> It is 64-bit register. What I said is the "movq", not "movl".
>> (I understand that movl is incorrect for 64-bit register).
>
> I didn't say anything about movl. I think what you're trying to say is
> that because your inputs like hcall_id and param1/2 are unsigned longs,
> you want a 64-bit move.
Yes. "movq" only indicates explicitly that it is 64-bit mov as ACRN
guest only works under 64-bit mode.
I also check the usage of "mov" and "movq" in this scenario. There is no
difference except that the movq is an explicit 64-op.
Of course "mov" is also ok to me that if you prefer the "mov".
Thanks
Yakui
>
Powered by blists - more mailing lists