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Message-Id: <20190429093631.10799-5-geert+renesas@glider.be>
Date: Mon, 29 Apr 2019 11:36:30 +0200
From: Geert Uytterhoeven <geert+renesas@...der.be>
To: Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Simon Horman <horms@...ge.net.au>,
Magnus Damm <magnus.damm@...il.com>,
Chris Brandt <chris.brandt@...esas.com>
Cc: devicetree@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-kernel@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>
Subject: [PATCH 4/5] ARM: dts: r7s72100: Add IRQC device node
Enable support for the IRQC on RZ/A1H, which is a small front-end to the
GIC. This allows to use up to 8 external interrupts with configurable
sense select.
Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
arch/arm/boot/dts/r7s72100.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 2211f88ede2ad351..27bc7789f5437ef1 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -670,6 +670,14 @@
status = "disabled";
};
+ irqc: interrupt-controller@...ef800 {
+ compatible = "renesas,r7s72100-irqc",
+ "renesas,rza1-irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xfcfef800 0x6>;
+ };
+
mtu2: timer@...f0000 {
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
reg = <0xfcff0000 0x400>;
--
2.17.1
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