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Message-Id: <20190429195759.18330-3-atish.patra@wdc.com>
Date: Mon, 29 Apr 2019 12:57:58 -0700
From: Atish Patra <atish.patra@....com>
To: linux-kernel@...r.kernel.org
Cc: Atish Patra <atish.patra@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Andrew Morton <akpm@...ux-foundation.org>,
Anup Patel <anup@...infault.org>,
Borislav Petkov <bp@...en8.de>,
Changbin Du <changbin.du@...el.com>,
Gary Guo <gary@...yguo.net>, "H. Peter Anvin" <hpa@...or.com>,
Ingo Molnar <mingo@...hat.com>,
Kees Cook <keescook@...omium.org>, linux-mm@...ck.org,
linux-riscv@...ts.infradead.org,
Luc Van Oostenryck <luc.vanoostenryck@...il.com>,
Palmer Dabbelt <palmer@...ive.com>,
Thomas Gleixner <tglx@...utronix.de>,
Vlastimil Babka <vbabka@...e.cz>,
x86@...nel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)),
Christoph Hellwig <hch@...radead.org>
Subject: [PATCH v2 2/3] RISC-V: Enable TLBFLUSH counters for debug kernel.
The TLB flush counters under vmstat seems to be very helpful while
debugging TLB flush performance in RISC-V.
Add the Kconfig option only for debug kernels.
Signed-off-by: Atish Patra <atish.patra@....com>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index eb56c82d8aa1..c1ee876d1e7f 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -49,6 +49,7 @@ config RISCV
select GENERIC_IRQ_MULTI_HANDLER
select ARCH_HAS_PTE_SPECIAL
select HAVE_EBPF_JIT if 64BIT
+ select HAVE_ARCH_DEBUG_TLBFLUSH if DEBUG_KERNEL
config MMU
def_bool y
--
2.21.0
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