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Message-Id: <72b64db0a3ae682d1c6f435fecf7876de2f57bc3.1556644355.git.agx@sigxcpu.org>
Date:   Tue, 30 Apr 2019 19:15:55 +0200
From:   Guido Günther <agx@...xcpu.org>
To:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Abel Vesa <abel.vesa@....com>,
        Carlo Caione <ccaione@...libre.com>,
        Daniel Baluta <daniel.baluta@....com>,
        "Angus Ainslie (Purism)" <angus@...ea.ca>,
        Guido Günther <agx@...xcpu.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v2] arm64: dts: imx8mq: Add a node for irqsteer

Add a node for the irqsteer interrupt controller found on the iMX8MQ
SoC.

Signed-off-by: Guido Günther <agx@...xcpu.org>
Reviewed-by: Lucas Stach <l.stach@...gutronix.de>

---
Changes from v1 as per comments from Lucas Stach
* Drop interrupt-parent
* Move compatible stings to a single line

 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 2cc939cfbd75..311f536d3bbf 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -798,6 +798,25 @@
 			};
 		};
 
+		bus@...00000 { /* AIPS4 */
+			compatible = "fsl,imx8mq-aips-bus", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x32c00000 0x32c00000 0x400000>;
+
+			irqsteer: interrupt-controller@...2d000 {
+				compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer";
+				reg = <0x32e2d000 0x1000>;
+				interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
+				clock-names = "ipg";
+				fsl,channel = <0>;
+				fsl,num-irqs = <64>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+			};
+		};
+
 		gpu: gpu@...00000 {
 			compatible = "vivante,gc";
 			reg = <0x38000000 0x40000>;
-- 
2.20.1

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