linux-kernel - [PATCH 1/2] arm64: dts: mt8183: add dsi node

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Date:   Sun, 5 May 2019 19:05:16 +0800
From:   Jitao Shi <jitao.shi@...iatek.com>
To:     Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
        Mark Rutland <mark.rutland@....com>,
        Ian Campbell <ijc+devicetree@...lion.org.uk>,
        Kumar Gala <galak@...eaurora.org>, <linux-pwm@...r.kernel.org>,
        David Airlie <airlied@...ux.ie>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     Jitao Shi <jitao.shi@...iatek.com>,
        Thierry Reding <treding@...dia.com>,
        Ajay Kumar <ajaykumar.rs@...sung.com>,
        Inki Dae <inki.dae@...sung.com>,
        Rahul Sharma <rahul.sharma@...sung.com>,
        Sean Paul <seanpaul@...omium.org>,
        Vincent Palatin <vpalatin@...omium.org>,
        Andy Yan <andy.yan@...k-chips.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Russell King <rmk+kernel@....linux.org.uk>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <dri-devel@...ts.freedesktop.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <srv_heupstream@...iatek.com>,
        Sascha Hauer <kernel@...gutronix.de>,
        <yingjoe.chen@...iatek.com>, <eddie.huang@...iatek.com>,
        <cawa.cheng@...iatek.com>, <bibby.hsieh@...iatek.com>,
        <ck.hu@...iatek.com>, <stonea168@....com>
Subject: [PATCH 1/2] arm64: dts: mt8183: add dsi node

Add dsi and mipitx nodes to the mt8183

Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index b36e37fcdfe3..84f465fa4fac 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -353,6 +353,16 @@
 			status = "disabled";
 		};
 
+		mipi_tx0: mipi-dphy@...50000 {
+			compatible = "mediatek,mt8183-mipi-tx";
+			reg = <0 0x11e50000 0 0x1000>;
+			clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>;
+			clock-names = "ref_clk";
+			#clock-cells = <0>;
+			#phy-cells = <0>;
+			clock-output-names = "mipi_tx0_pll";
+		};
+
 		mfgcfg: syscon@...00000 {
 			compatible = "mediatek,mt8183-mfgcfg", "syscon";
 			reg = <0 0x13000000 0 0x1000>;
@@ -365,6 +375,20 @@
 			#clock-cells = <1>;
 		};
 
+		dsi0: dsi@...14000 {
+			compatible = "mediatek,mt8183-dsi";
+			reg = <0 0x14014000 0 0x1000>;
+			interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
+			power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+			mediatek,syscon-dsi = <&mmsys 0x140>;
+			clocks = <&mmsys CLK_MM_DSI0_MM>,
+				<&mmsys CLK_MM_DSI0_IF>,
+				<&mipi_tx0>;
+			clock-names = "engine", "digital", "hs";
+			phys = <&mipi_tx0>;
+			phy-names = "dphy";
+		};
+
 		smi_common: smi@...19000 {
 			compatible = "mediatek,mt8183-smi-common", "syscon";
 			reg = <0 0x14019000 0 0x1000>;
-- 
2.21.0