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Message-Id: <20190506193115.20909-1-niklas.cassel@linaro.org>
Date: Mon, 6 May 2019 21:31:15 +0200
From: Niklas Cassel <niklas.cassel@...aro.org>
To: Andy Gross <agross@...nel.org>,
David Brown <david.brown@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: amit.kucheria@...aro.org, jorge.ramirez-ortiz@...aro.org,
lina.iyer@...aro.org, ulf.hansson@...aro.org,
bjorn.andersson@...aro.org,
Niklas Cassel <niklas.cassel@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: qcom: qcs404: Add PSCI cpuidle support
Add device bindings for CPUs to suspend using PSCI as the enable-method.
Signed-off-by: Niklas Cassel <niklas.cassel@...aro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index ffedf9640af7..f9db9f3ee10c 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -31,6 +31,7 @@
reg = <0x100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ cpu-idle-states = <&CPU_PC>;
};
CPU1: cpu@101 {
@@ -39,6 +40,7 @@
reg = <0x101>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ cpu-idle-states = <&CPU_PC>;
};
CPU2: cpu@102 {
@@ -47,6 +49,7 @@
reg = <0x102>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ cpu-idle-states = <&CPU_PC>;
};
CPU3: cpu@103 {
@@ -55,12 +58,24 @@
reg = <0x103>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ cpu-idle-states = <&CPU_PC>;
};
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
};
+
+ idle-states {
+ CPU_PC: pc {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <125>;
+ exit-latency-us = <180>;
+ min-residency-us = <595>;
+ local-timer-stop;
+ };
+ };
};
firmware {
--
2.21.0
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