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Date:   Mon, 6 May 2019 09:37:35 +0200
From:   Sascha Hauer <s.hauer@...gutronix.de>
To:     Chuanhua Han <chuanhua.han@....com>
Cc:     "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "festevam@...il.com" <festevam@...il.com>,
        dl-linux-imx <linux-imx@....com>,
        "wsa+renesas@...g-engineering.com" <wsa+renesas@...g-engineering.com>,
        "u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
        "eha@...f.com" <eha@...f.com>,
        "linux@...pel-privat.de" <linux@...pel-privat.de>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "peda@...ntia.se" <peda@...ntia.se>,
        Sumit Batra <sumit.batra@....com>
Subject: Re: [EXT] Re: [PATCH 1/2] i2c: imx: I2C Driver doesn't consider
 I2C_IPGCLK_SEL RCW bit when using ls1046a SoC

On Sat, May 04, 2019 at 09:28:48AM +0000, Chuanhua Han wrote:
> 
> 
> > -----Original Message-----
> > From: Sascha Hauer <s.hauer@...gutronix.de>
> > Sent: 2019年4月30日 20:51
> > To: Chuanhua Han <chuanhua.han@....com>
> > Cc: shawnguo@...nel.org; Leo Li <leoyang.li@....com>; robh+dt@...nel.org;
> > mark.rutland@....com; linux-kernel@...r.kernel.org;
> > linux-i2c@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> > devicetree@...r.kernel.org; festevam@...il.com; dl-linux-imx
> > <linux-imx@....com>; wsa+renesas@...g-engineering.com;
> > u.kleine-koenig@...gutronix.de; eha@...f.com; linux@...pel-privat.de;
> > l.stach@...gutronix.de; peda@...ntia.se; Sumit Batra
> > <sumit.batra@....com>
> > Subject: [EXT] Re: [PATCH 1/2] i2c: imx: I2C Driver doesn't consider
> > I2C_IPGCLK_SEL RCW bit when using ls1046a SoC
> > 
> > Caution: EXT Email
> > 
> > On Tue, Apr 30, 2019 at 12:47:18PM +0800, Chuanhua Han wrote:
> > > The current kernel driver does not consider I2C_IPGCLK_SEL (424 bit of
> > > RCW) in deciding  i2c_clk_rate in function i2c_imx_set_clk() { 0
> > > Platform clock/4, 1 Platform clock/2}.
> > >
> > > When using ls1046a SoC, this populates incorrect value in IBFD
> > > register if I2C_IPGCLK_SEL = 0, which generates half of the desired Clock.
> > >
> > > Therefore, if ls1046a SoC is used, we need to set the i2c clock
> > > according to the corresponding RCW.
> > 
> > So the clock driver reports the wrong clock. Please fix the clock driver then.
> No, this is a problem with the i2c driver. It is not a problem with
> the clock driver, so the i2c driver needs to be modified.

So how does this RCW bit get evaluated? According to the reference
manual only one clock goes to the i2c module (described as 1/2 Platform
Clock) and the i2c module only takes one clock. So it seems there must
be a /2 divider somewhere, either in each i2c module or somewhere
outside. Can your IC guys tell you where it is?

One reason I suggested the clock driver is that the clock driver
contains SoC specific code already, so it should be easier to integrate
there.

Sascha


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