linux-kernel - RE: [PATCH 3/3] arm64: dts: imx8mm: add clock for GPIO node

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Message-ID: <AM0PR04MB4211EC52A3A2974BFD9A190380300@AM0PR04MB4211.eurprd04.prod.outlook.com>
Date:   Mon, 6 May 2019 09:31:00 +0000
From:   Aisheng Dong <aisheng.dong@....com>
To:     Anson Huang <anson.huang@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        "festevam@...il.com" <festevam@...il.com>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        Leonard Crestez <leonard.crestez@....com>,
        Jacky Bai <ping.bai@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
CC:     dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 3/3] arm64: dts: imx8mm: add clock for GPIO node

> From: Anson Huang
> Sent: Monday, May 6, 2019 5:18 PM
> Subject: [PATCH 3/3] arm64: dts: imx8mm: add clock for GPIO node
> 
> i.MX8MM has clock gate for each GPIO bank, add clock info to GPIO node for
> clock management.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>

Reviewed-by: Dong Aisheng <aisheng.dong@....com>

Regards
Dong Aisheng

> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 6b407a94..f32d4e9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -206,6 +206,7 @@
>  				reg = <0x30200000 0x10000>;
>  				interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_GPIO1_ROOT>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
> @@ -217,6 +218,7 @@
>  				reg = <0x30210000 0x10000>;
>  				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_GPIO2_ROOT>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
> @@ -228,6 +230,7 @@
>  				reg = <0x30220000 0x10000>;
>  				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_GPIO3_ROOT>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
> @@ -239,6 +242,7 @@
>  				reg = <0x30230000 0x10000>;
>  				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_GPIO4_ROOT>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
> @@ -250,6 +254,7 @@
>  				reg = <0x30240000 0x10000>;
>  				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
>  					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clk IMX8MM_CLK_GPIO5_ROOT>;
>  				gpio-controller;
>  				#gpio-cells = <2>;
>  				interrupt-controller;
> --
> 2.7.4