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Message-id: <20190506130046.20898-1-m.szyprowski@samsung.com>
Date: Mon, 06 May 2019 15:00:46 +0200
From: Marek Szyprowski <m.szyprowski@...sung.com>
To: linux-usb@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Marek Szyprowski <m.szyprowski@...sung.com>,
Minas Harutyunyan <hminas@...opsys.com>,
Felipe Balbi <felipe.balbi@...ux.intel.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Jules Maselbas <jmaselbas@...ray.eu>,
Krzysztof Kozlowski <krzk@...nel.org>
Subject: [PATCH] usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs
Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.
Reported-by: Krzysztof Kozlowski <krzk@...nel.org>
Fixes: 707d80f0a3c5 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski <m.szyprowski@...sung.com>
---
drivers/usb/dwc2/params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 6900eea57526..9ece4affb9d4 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
struct dwc2_core_params *p = &hsotg->params;
p->power_down = 0;
+ p->phy_utmi_width = 8;
}
static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
--
2.17.1
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