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Message-ID: <CAJMQK-i===iehSxLky1rZMnYhZfrnAJzWtDxT2OLOwRnKwaZoA@mail.gmail.com>
Date: Tue, 7 May 2019 16:57:47 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: "michael.kao" <michael.kao@...iatek.com>
Cc: fan.chen@...iatek.com, jamesjj.liao@...iatek.com,
dawei.chien@...iatek.com, louis.yu@...iatek.com,
roger.lu@...iatek.com, Zhang Rui <rui.zhang@...el.com>,
Eduardo Valentin <edubezval@...il.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, Matthias Kaehlcke <mka@...omium.org>,
linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 4/8] arm64: dts: mt8183: Configure CPU cooling
On Thu, May 2, 2019 at 10:43 AM michael.kao <michael.kao@...iatek.com> wrote:
>
> From: Matthias Kaehlcke <mka@...omium.org>
>
> Add two passive trip points at 68°C and 85°C for the CPU temperature.
>
> Signed-off-by: Matthias Kaehlcke <mka@...omium.org>
> Signed-off-by: Michael Kao <michael.kao@...iatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 95f1d7b..0b3294b 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -375,6 +375,61 @@
>
> thermal-sensors = <&thermal 0>;
> sustainable-power = <1500>;
> +
> + trips {
> + threshold: trip-point@0 {
> + temperature = <68000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + target: trip-point@1 {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu-crit {
> + temperature = <115000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&target>;
> + cooling-device = <&cpu0
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu1
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu2
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu3
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>;
> + contribution = <3072>;
> + };
> + map1 {
> + trip = <&target>;
> + cooling-device = <&cpu4
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu5
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu6
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>,
> + <&cpu7
> + THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>;
> + contribution = <1024>;
> + };
> + };
> };
>
> tzts1: tzts1 {
Tested-by: Hsin-Yi Wang <hsinyi@...omium.org>
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