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Message-ID: <20190508093421.GD2606@hirez.programming.kicks-ass.net>
Date: Wed, 8 May 2019 11:34:21 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
jolsa@...hat.com, adrian.hunter@...el.com
Subject: Re: [PATCH 2/2] perf/x86/intel: Support PEBS output to PT
On Thu, May 02, 2019 at 01:50:22PM +0300, Alexander Shishkin wrote:
> The output setting is per-CPU, so all PEBS events must be either writing
> to PT or to the DS area, so in order to not mess up the event scheduling,
> we fall back to the latter in case both types of events are scheduled in.
> +static void intel_pmu_pebs_via_pt_disable(struct perf_event *event)
> +{
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_PEBS_VIA_PT))
> + return;
> +
> + if (!(cpuc->pebs_enabled & ~PEBS_VIA_PT_MASK))
> + cpuc->pebs_enabled &= ~PEBS_VIA_PT_MASK;
> +}
> +
> +static void intel_pmu_pebs_via_pt_enable(struct perf_event *event)
> +{
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> + struct hw_perf_event *hwc = &event->hw;
> + struct debug_store *ds = cpuc->ds;
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_PEBS_VIA_PT))
> + return;
> +
> + /*
> + * In case there's a mix of PEBS->PT and PEBS->DS, fall back
> + * to DS.
> + */
> + if (cpuc->n_pebs != cpuc->n_pebs_via_pt) {
> + /* PEBS-to-DS events present, fall back to DS */
> + intel_pmu_pebs_via_pt_disable(event);
> + return;
> + }
> +
> + if (!(event->hw.flags & PERF_X86_EVENT_LARGE_PEBS))
> + cpuc->pebs_enabled |= PEBS_PMI_AFTER_EACH_RECORD;
> +
> + cpuc->pebs_enabled |= PEBS_OUTPUT_PT;
> +
> + wrmsrl(MSR_RELOAD_PMC0 + hwc->idx, ds->pebs_event_reset[hwc->idx]);
> +}
> +
> void intel_pmu_pebs_enable(struct perf_event *event)
> {
> struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> @@ -1100,6 +1146,8 @@ void intel_pmu_pebs_enable(struct perf_event *event)
> } else {
> ds->pebs_event_reset[hwc->idx] = 0;
> }
> +
> + intel_pmu_pebs_via_pt_enable(event);
> }
I think that doesn't even do what it says on the tin. Suppose you first
schedule that PEBS-via-PT event and then the normal one, nothing then
cancels the PT link.
Like I wrote in that prevoius email; I really don't like this. I think
silently falling back to another output method is wrong.
Ideally we create schedulig conflicts and cause the PT and DS events to
round robin.
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