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Message-ID: <20190508115946.GL2606@hirez.programming.kicks-ass.net>
Date: Wed, 8 May 2019 13:59:46 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: kan.liang@...ux.intel.com
Cc: tglx@...utronix.de, mingo@...hat.com, linux-kernel@...r.kernel.org,
acme@...nel.org, eranian@...gle.com, ak@...ux.intel.com
Subject: Re: [RESEND PATCH 0/6] Perf uncore support for Snow Ridge server
On Tue, Apr 30, 2019 at 05:53:42PM -0700, kan.liang@...ux.intel.com wrote:
> From: Kan Liang <kan.liang@...ux.intel.com>
>
> The patch series intends to enable perf uncore support for Snow Ridge
> server.
>
> Here is the link for the uncore document.
> https://cdrdv2.intel.com/v1/dl/getContent/611319
>
> Patch 1: Fixes a generic issue for uncore free-running counter, which
> also impacts the Snow Ridge server.
>
> Patch 2-6: Perf uncore support for Snow Ridge server.
>
> Kan Liang (6):
> perf/x86/intel/uncore: Handle invalid event coding for free-running
> counter
> perf/x86/intel/uncore: Add uncore support for Snow Ridge server
> perf/x86/intel/uncore: Extract codes of box ref/unref
> perf/x86/intel/uncore: Support MMIO type uncore blocks
> perf/x86/intel/uncore: Clean up client IMC
> perf/x86/intel/uncore: Add IMC uncore support for Snow Ridge
>
> arch/x86/events/intel/uncore.c | 122 +++++--
> arch/x86/events/intel/uncore.h | 41 ++-
> arch/x86/events/intel/uncore_snb.c | 16 +-
> arch/x86/events/intel/uncore_snbep.c | 601 +++++++++++++++++++++++++++++++++++
> 4 files changed, 737 insertions(+), 43 deletions(-)
Thanks!
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