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Message-ID: <CY4PR2201MB12721916F1A614679A308F7EC1330@CY4PR2201MB1272.namprd22.prod.outlook.com>
Date: Thu, 9 May 2019 23:52:52 +0000
From: Paul Burton <paul.burton@...s.com>
To: Paul Cercueil <paul@...pouillou.net>
CC: Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <pburton@...ecomp.com>,
James Hogan <jhogan@...nel.org>, "od@...c.me" <od@...c.me>,
"linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Paul Cercueil <paul@...pouillou.net>,
"linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>
Subject: Re: [PATCH v2] MIPS: Fix Ingenic SoCs sometimes reporting wrong ISA
Hello,
Paul Cercueil wrote:
> The config0 register in the Xburst CPUs with a processor ID of
> PRID_COMP_INGENIC_D0 report themselves as MIPS32r2 compatible,
> but they don't actually support this ISA.
>
> Signed-off-by: Paul Cercueil <paul@...pouillou.net>
Applied to mips-next.
Thanks,
Paul
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